The present invention relates to a semiconductor memory device having a plurality of SRAMs (Static Random Access Memories) operable in synchronism with a clock signal and, more particularly, to a semiconductor memory device which allows a plurality of data to be read thereoutof at the same time.
A conventional semiconductor memory device of the type described has a data input terminal, an address input terminal, a write enable signal input terminal, a clock input terminal, a plurality of (N) SRAMs each having a data output terminal, and N address decoders each being associated respective one of the SRAMs. To read N different data out of the memory device at the same time, it has been customary to write identical data in all of the SRAMs beforehand and to cause the address decoders to select data stored in different addresses of the SRAMs. The drawback with such a conventional memory device is that the SRAMs each needs a capacity great enough to accommodate all of the data, increasing the chip area and aggravating current consumption.